<p>Martin Roth has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20354">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src/include: add IS_ENABLED() around Kconfig symbol references<br><br>Change-Id: I2fbe6376a1cf98d328464556917638a5679641d2<br>Signed-off-by: Martin Roth <martinroth@google.com><br>---<br>M src/include/cpu/amd/car.h<br>M src/include/cpu/x86/lapic.h<br>M src/include/cpu/x86/post_code.h<br>M src/include/cpu/x86/smm.h<br>M src/include/cpu/x86/tsc.h<br>M src/include/device/device.h<br>M src/include/device/pci.h<br>M src/include/device/pci_ehci.h<br>M src/include/elog.h<br>M src/include/option.h<br>M src/include/pc80/mc146818rtc.h<br>M src/include/smp/atomic.h<br>M src/include/smp/node.h<br>M src/include/smp/spinlock.h<br>M src/include/stddef.h<br>M src/include/thread.h<br>M src/include/timestamp.h<br>M src/include/trace.h<br>M src/include/watchdog.h<br>19 files changed, 27 insertions(+), 27 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/20354/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/include/cpu/amd/car.h b/src/include/cpu/amd/car.h<br>index b4fbd60..47a9dfa 100644<br>--- a/src/include/cpu/amd/car.h<br>+++ b/src/include/cpu/amd/car.h<br>@@ -10,7 +10,7 @@<br> void cache_as_ram_switch_stack(void *stacktop);<br> void cache_as_ram_new_stack(void);<br> <br>-#if CONFIG_CPU_AMD_AGESA || CONFIG_CPU_AMD_PI<br>+#if IS_ENABLED(CONFIG_CPU_AMD_AGESA) || IS_ENABLED(CONFIG_CPU_AMD_PI)<br> void disable_cache_as_ram(void);<br> #endif<br> <br>diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h<br>index 6f3cbdb..e781b5a 100644<br>--- a/src/include/cpu/x86/lapic.h<br>+++ b/src/include/cpu/x86/lapic.h<br>@@ -7,7 +7,7 @@<br> #include <smp/node.h><br> <br> /* See if I need to initialize the local APIC */<br>-#if CONFIG_SMP || CONFIG_IOAPIC<br>+#if IS_ENABLED(CONFIG_SMP) || IS_ENABLED(CONFIG_IOAPIC)<br> #  define NEED_LAPIC 1<br> #else<br> #  define NEED_LAPIC 0<br>@@ -54,7 +54,7 @@<br>  return lapic_read(LAPIC_ID) >> 24;<br> }<br> <br>-#if !CONFIG_AP_IN_SIPI_WAIT<br>+#if !IS_ENABLED(CONFIG_AP_IN_SIPI_WAIT)<br> /* If we need to go back to sipi wait, we use the long non-inlined version of<br>  * this function in lapic_cpu_init.c<br>  */<br>@@ -149,7 +149,7 @@<br> <br> void setup_lapic(void);<br> <br>-#if CONFIG_SMP<br>+#if IS_ENABLED(CONFIG_SMP)<br> struct device;<br> int start_cpu(struct device *cpu);<br> #endif /* CONFIG_SMP */<br>diff --git a/src/include/cpu/x86/post_code.h b/src/include/cpu/x86/post_code.h<br>index 6acfe10..cd3d159 100644<br>--- a/src/include/cpu/x86/post_code.h<br>+++ b/src/include/cpu/x86/post_code.h<br>@@ -2,7 +2,7 @@<br> #include <console/post_codes.h><br> <br> <br>-#if CONFIG_POST_IO<br>+#if IS_ENABLED(CONFIG_POST_IO)<br> #define post_code(value)        \<br>         movb    $value, %al;    \<br>     outb    %al, $CONFIG_POST_IO_PORT<br>diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h<br>index 15e3ed3..41afd08 100644<br>--- a/src/include/cpu/x86/smm.h<br>+++ b/src/include/cpu/x86/smm.h<br>@@ -478,7 +478,7 @@<br> <br> void southbridge_smi_set_eos(void);<br> <br>-#if CONFIG_SMM_TSEG<br>+#if IS_ENABLED(CONFIG_SMM_TSEG)<br> void cpu_smi_handler(void);<br> void northbridge_smi_handler(void);<br> void southbridge_smi_handler(void);<br>@@ -493,7 +493,7 @@<br> int  mainboard_smi_apmc(u8 data);<br> void mainboard_smi_sleep(u8 slp_typ);<br> <br>-#if !CONFIG_SMM_TSEG<br>+#if !IS_ENABLED(CONFIG_SMM_TSEG)<br> void smi_release_lock(void);<br> #endif<br> <br>diff --git a/src/include/cpu/x86/tsc.h b/src/include/cpu/x86/tsc.h<br>index 5a7fbc2..4cf4fbc 100644<br>--- a/src/include/cpu/x86/tsc.h<br>+++ b/src/include/cpu/x86/tsc.h<br>@@ -3,9 +3,9 @@<br> <br> #include <stdint.h><br> <br>-#if CONFIG_TSC_SYNC_MFENCE<br>+#if IS_ENABLED(CONFIG_TSC_SYNC_MFENCE)<br> #define TSC_SYNC "mfence\n"<br>-#elif CONFIG_TSC_SYNC_LFENCE<br>+#elif IS_ENABLED(CONFIG_TSC_SYNC_LFENCE)<br> #define TSC_SYNC "lfence\n"<br> #else<br> #define TSC_SYNC<br>diff --git a/src/include/device/device.h b/src/include/device/device.h<br>index 5bc4d1c..242d297 100644<br>--- a/src/include/device/device.h<br>+++ b/src/include/device/device.h<br>@@ -53,7 +53,7 @@<br>         void (*disable)(device_t dev);<br>        void (*set_link)(device_t dev, unsigned int link);<br>    void (*reset_bus)(struct bus *bus);<br>-#if CONFIG_GENERATE_SMBIOS_TABLES<br>+#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES)<br>       int (*get_smbios_data)(device_t dev, int *handle,<br>             unsigned long *current);<br>      void (*get_smbios_strings)(device_t dev, struct smbios_type11 *t);<br>@@ -163,7 +163,7 @@<br> <br> extern const char mainboard_name[];<br> <br>-#if CONFIG_GFXUMA<br>+#if IS_ENABLED(CONFIG_GFXUMA)<br> /* IGD UMA memory */<br> extern uint64_t uma_memory_base;<br> extern uint64_t uma_memory_size;<br>diff --git a/src/include/device/pci.h b/src/include/device/pci.h<br>index 4f6dfbc..4283141 100644<br>--- a/src/include/device/pci.h<br>+++ b/src/include/device/pci.h<br>@@ -15,7 +15,7 @@<br> #ifndef PCI_H<br> #define PCI_H<br> <br>-#if CONFIG_PCI<br>+#if IS_ENABLED(CONFIG_PCI)<br> <br> #include <stdint.h><br> #include <stddef.h><br>diff --git a/src/include/device/pci_ehci.h b/src/include/device/pci_ehci.h<br>index 1eb3cd0..48178c8 100644<br>--- a/src/include/device/pci_ehci.h<br>+++ b/src/include/device/pci_ehci.h<br>@@ -29,7 +29,7 @@<br> void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base);<br> <br> #ifndef __PRE_RAM__<br>-#if !CONFIG_USBDEBUG<br>+#if !IS_ENABLED(CONFIG_USBDEBUG)<br> #define pci_ehci_read_resources pci_dev_read_resources<br> #else<br> /* Relocation of EHCI Debug Port BAR<br>diff --git a/src/include/elog.h b/src/include/elog.h<br>index ecda87d..f6f0bdd 100644<br>--- a/src/include/elog.h<br>+++ b/src/include/elog.h<br>@@ -206,7 +206,7 @@<br> /* Deep Sx wake variant */<br> #define ELOG_TYPE_ACPI_DEEP_WAKE          0xad<br> <br>-#if CONFIG_ELOG<br>+#if IS_ENABLED(CONFIG_ELOG)<br> /* Eventlog backing storage must be initialized before calling elog_init(). */<br> extern int elog_init(void);<br> extern int elog_clear(void);<br>diff --git a/src/include/option.h b/src/include/option.h<br>index 83f3a84..f6ede96 100644<br>--- a/src/include/option.h<br>+++ b/src/include/option.h<br>@@ -6,7 +6,7 @@<br>  * storage can be used. This will benefit machines without CMOS as well as those<br>  * without a battery-backed CMOS (e.g. some laptops).<br>  */<br>-#if CONFIG_USE_OPTION_TABLE<br>+#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)<br> #include <pc80/mc146818rtc.h><br> #else<br> #include <types.h><br>diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h<br>index ec0bf8e..f6a1c04 100644<br>--- a/src/include/pc80/mc146818rtc.h<br>+++ b/src/include/pc80/mc146818rtc.h<br>@@ -1,7 +1,7 @@<br> #ifndef PC80_MC146818RTC_H<br> #define PC80_MC146818RTC_H<br> <br>-#if CONFIG_ARCH_X86<br>+#if IS_ENABLED(CONFIG_ARCH_X86)<br> <br> #include <arch/io.h><br> #include <types.h><br>@@ -193,8 +193,8 @@<br> #define read_option(name, default) read_option_lowlevel(CMOS_VSTART_ ##name, \<br>     CMOS_VLEN_ ##name, (default))<br> <br>-#if CONFIG_CMOS_POST<br>-#if CONFIG_USE_OPTION_TABLE<br>+#if IS_ENABLED(CONFIG_CMOS_POST)<br>+#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)<br> # include "option_table.h"<br> # define CMOS_POST_OFFSET (CMOS_VSTART_cmos_post_offset >> 3)<br> #else<br>@@ -241,7 +241,7 @@<br>          /* Initialize to zero */<br>              cmos_write(0, CMOS_POST_BANK_0_OFFSET);<br>               cmos_write(0, CMOS_POST_BANK_1_OFFSET);<br>-#if CONFIG_CMOS_POST_EXTRA<br>+#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA)<br>                 cmos_write32(CMOS_POST_BANK_0_EXTRA, 0);<br>              cmos_write32(CMOS_POST_BANK_1_EXTRA, 0);<br> #endif<br>diff --git a/src/include/smp/atomic.h b/src/include/smp/atomic.h<br>index 56df9f5..5db59e9 100644<br>--- a/src/include/smp/atomic.h<br>+++ b/src/include/smp/atomic.h<br>@@ -1,7 +1,7 @@<br> #ifndef SMP_ATOMIC_H<br> #define SMP_ATOMIC_H<br> <br>-#if CONFIG_SMP<br>+#if IS_ENABLED(CONFIG_SMP)<br> #include <arch/smp/atomic.h><br> #else<br> <br>diff --git a/src/include/smp/node.h b/src/include/smp/node.h<br>index 4e45c46..65931bc 100644<br>--- a/src/include/smp/node.h<br>+++ b/src/include/smp/node.h<br>@@ -1,7 +1,7 @@<br> #ifndef _SMP_NODE_H_<br> #define _SMP_NODE_H_<br> <br>-#if CONFIG_SMP<br>+#if IS_ENABLED(CONFIG_SMP)<br> int boot_cpu(void);<br> #else<br> #define boot_cpu(x) 1<br>diff --git a/src/include/smp/spinlock.h b/src/include/smp/spinlock.h<br>index f181f45..a7b8001 100644<br>--- a/src/include/smp/spinlock.h<br>+++ b/src/include/smp/spinlock.h<br>@@ -1,7 +1,7 @@<br> #ifndef SMP_SPINLOCK_H<br> #define SMP_SPINLOCK_H<br> <br>-#if CONFIG_SMP<br>+#if IS_ENABLED(CONFIG_SMP)<br> #include <arch/smp/spinlock.h><br> #else /* !CONFIG_SMP */<br> <br>diff --git a/src/include/stddef.h b/src/include/stddef.h<br>index af63196..5df7735 100644<br>--- a/src/include/stddef.h<br>+++ b/src/include/stddef.h<br>@@ -37,7 +37,7 @@<br> #endif<br> <br> /* Work around non-writable data segment in execute-in-place romstage on x86. */<br>-#if defined(__PRE_RAM__) && CONFIG_ARCH_X86<br>+#if defined(__PRE_RAM__) && IS_ENABLED(CONFIG_ARCH_X86)<br> #define MAYBE_STATIC<br> #else<br> #define MAYBE_STATIC static<br>diff --git a/src/include/thread.h b/src/include/thread.h<br>index 586fb3a..ed04beb 100644<br>--- a/src/include/thread.h<br>+++ b/src/include/thread.h<br>@@ -21,7 +21,7 @@<br> #include <timer.h><br> #include <arch/cpu.h><br> <br>-#if CONFIG_COOP_MULTITASKING && !defined(__SMM__) && !defined(__PRE_RAM__)<br>+#if IS_ENABLED(CONFIG_COOP_MULTITASKING) && !defined(__SMM__) && !defined(__PRE_RAM__)<br> <br> struct thread {<br>         int id;<br>diff --git a/src/include/timestamp.h b/src/include/timestamp.h<br>index 58edb52..d073529 100644<br>--- a/src/include/timestamp.h<br>+++ b/src/include/timestamp.h<br>@@ -18,7 +18,7 @@<br> <br> #include <commonlib/timestamp_serialized.h><br> <br>-#if CONFIG_COLLECT_TIMESTAMPS && (CONFIG_EARLY_CBMEM_INIT \<br>+#if IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS) && (IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) \<br>         || !defined(__PRE_RAM__))<br> /*<br>  * timestamp_init() needs to be called once for each of these cases:<br>diff --git a/src/include/trace.h b/src/include/trace.h<br>index 8745966..12c7fa6 100644<br>--- a/src/include/trace.h<br>+++ b/src/include/trace.h<br>@@ -25,7 +25,7 @@<br> <br> #else /* !__PRE_RAM__ */<br> <br>-#if CONFIG_TRACE && !defined(__SMM__)<br>+#if IS_ENABLED(CONFIG_TRACE) && !defined(__SMM__)<br> <br> void __cyg_profile_func_enter(void *, void *)<br>                                  __attribute__ ((no_instrument_function));<br>diff --git a/src/include/watchdog.h b/src/include/watchdog.h<br>index 375563d..e8de580 100644<br>--- a/src/include/watchdog.h<br>+++ b/src/include/watchdog.h<br>@@ -1,7 +1,7 @@<br> #ifndef WATCHDOG_H<br> #define WATCHDOG_H<br> <br>-#if CONFIG_USE_WATCHDOG_ON_BOOT<br>+#if IS_ENABLED(CONFIG_USE_WATCHDOG_ON_BOOT)<br> void watchdog_off(void);<br> #else<br> #define watchdog_off() { while (0); }<br></pre><p>To view, visit <a href="https://review.coreboot.org/20354">change 20354</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20354"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I2fbe6376a1cf98d328464556917638a5679641d2 </div>
<div style="display:none"> Gerrit-Change-Number: 20354 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Martin Roth <martinroth@google.com> </div>