<p>Patrick Rudolph has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/20287">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/nehalem/gma: Set ASLS on S3 resume<br><br>Set ASLS on S3 resume, too.<br>Use new GMA driver method to set ASLS.<br><br>Change-Id: Ifc921d7aa2d5b771fc4eaf3ec776c3a13f5496eb<br>Signed-off-by: Patrick Rudolph <siro@das-labor.org><br>---<br>M src/northbridge/intel/nehalem/gma.c<br>1 file changed, 33 insertions(+), 19 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/20287/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c<br>index fa84f78..0c90c29 100644<br>--- a/src/northbridge/intel/nehalem/gma.c<br>+++ b/src/northbridge/intel/nehalem/gma.c<br>@@ -997,6 +997,25 @@<br> <br> #endif<br> <br>+/* Enable SCI to ACPI _GPE._L06 */<br>+static void gma_enable_swsci(void)<br>+{<br>+ u16 reg16;<br>+<br>+ /* clear DMISCI status */<br>+ reg16 = inw(DEFAULT_PMBASE + TCO1_STS);<br>+ reg16 &= DMISCI_STS;<br>+ outw(DEFAULT_PMBASE + TCO1_STS, reg16);<br>+<br>+ /* clear acpi tco status */<br>+ outl(DEFAULT_PMBASE + GPE0_STS, TCOSCI_STS);<br>+<br>+ /* enable acpi tco scis */<br>+ reg16 = inw(DEFAULT_PMBASE + GPE0_EN);<br>+ reg16 |= TCOSCI_EN;<br>+ outw(DEFAULT_PMBASE + GPE0_EN, reg16);<br>+}<br>+<br> static void gma_func0_init(struct device *dev)<br> {<br> u32 reg32;<br>@@ -1046,6 +1065,20 @@<br> <br> /* Post VBIOS init */<br> gma_pm_init_post_vbios(dev);<br>+<br>+ if (acpi_is_wakeup_s3()) {<br>+ /* GNVS has been already set up */<br>+ const global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);<br>+<br>+ if (gnvs && gnvs->aslb) {<br>+ gma_enable_swsci();<br>+<br>+ /* Provide ACPI OpRegion address */<br>+ intel_gma_opregion_register((uintptr_t)gnvs->aslb);<br>+ } else {<br>+ printk(BIOS_ERR, "Error: GNVS table not found.\n");<br>+ }<br>+ }<br> }<br> <br> static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)<br>@@ -1098,25 +1131,6 @@<br> }<br> <br> drivers_intel_gma_displays_ssdt_generate(gfx);<br>-}<br>-<br>-/* Enable SCI to ACPI _GPE._L06 */<br>-static void gma_enable_swsci(void)<br>-{<br>- u16 reg16;<br>-<br>- /* clear DMISCI status */<br>- reg16 = inw(DEFAULT_PMBASE + TCO1_STS);<br>- reg16 &= DMISCI_STS;<br>- outw(DEFAULT_PMBASE + TCO1_STS, reg16);<br>-<br>- /* clear acpi tco status */<br>- outl(DEFAULT_PMBASE + GPE0_STS, TCOSCI_STS);<br>-<br>- /* enable acpi tco scis */<br>- reg16 = inw(DEFAULT_PMBASE + GPE0_EN);<br>- reg16 |= TCOSCI_EN;<br>- outw(DEFAULT_PMBASE + GPE0_EN, reg16);<br> }<br> <br> static unsigned long<br></pre><p>To view, visit <a href="https://review.coreboot.org/20287">change 20287</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/20287"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ifc921d7aa2d5b771fc4eaf3ec776c3a13f5496eb </div>
<div style="display:none"> Gerrit-Change-Number: 20287 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Patrick Rudolph <siro@das-labor.org> </div>