From d9325ff2beec5549ea7db75153c7864e634c59fe Mon Sep 17 00:00:00 2001
From: Blue Swirl <blauwirbel@gmail.com>
Date: Tue, 29 Dec 2009 17:48:14 +0000
Subject: [PATCH] Use also other page sizes than 8k in miss handler

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
---
 arch/sparc64/vectors.S |   97 +++++++++++++++++++++++++++++++++++++++++++----
 1 files changed, 88 insertions(+), 9 deletions(-)

diff --git a/arch/sparc64/vectors.S b/arch/sparc64/vectors.S
index 6b3d5be..f5a54e3 100644
--- a/arch/sparc64/vectors.S
+++ b/arch/sparc64/vectors.S
@@ -337,17 +337,56 @@ dmmu_next_trans:
         brlz    %g7, dmmu_next_trans  ! va < t->virt ?
          nop
         ldx     [%g3+0x10], %g4       ! t->size
-        sub     %g7, %g4, %g4         ! va >= t->virt - t->size ?
-        brgez   %g4, dmmu_next_trans
-         nop
-
-        ! install 8k tlb entry
-
+        cmp     %g7, %g4              ! va >= t->virt - t->size ?
+        bge     dmmu_next_trans
+         sethi  %hi(8192), %g2
+
+        cmp     %g4, %g2
+        ble     dmmu_install
+         sethi  %hi(0x80000000), %g2  ! valid tte, 8k size (in delay slot)
+
+dmmu_64k:
+        sethi   %hi(65536), %g2
+        cmp     %g4, %g2
+        bgt     dmmu_512k
+         sethi  %hi(0xa0000000), %g2  ! valid tte, 64k size
+
+        srlx    %g7, 16, %g7          ! round va to 64k page
+        sllx    %g7, 16, %g7
+        srlx    %g1, 16, %g1          ! round offset to 64k page
+
+        ! install 64k tlb entry
+        ba      dmmu_install
+         sllx   %g1, 16, %g1
+
+dmmu_512k:
+        sethi   %hi(512*1024), %g2
+        cmp     %g4, %g2
+        bgt     dmmu_4m
+         sethi  %hi(0xc0000000), %g2 ! valid tte, 512k size
+
+        srlx    %g7, 19, %g7          ! round va to 512k page
+        sllx    %g7, 19, %g7
+        srlx    %g1, 19, %g1          ! round offset to 512k page
+
+        ! install 512k tlb entry
+        ba      dmmu_install
+         sllx    %g1, 19, %g1
+
+dmmu_4m:
+        srlx    %g7, 22, %g7          ! round va to 4M page
+        sllx    %g7, 22, %g7
+        srlx    %g1, 22, %g1          ! round offset to 4M page
+        sllx    %g1, 22, %g1
+
+        ! install 4M tlb entry
+        sethi   %hi(0xe0000000), %g2  ! valid tte, 4M size
+
+dmmu_install:
         ldx     [%g3+0x18], %g4       ! t->phys
         add     %g4, %g7, %g4         ! %g4 page physical address = t->phys + offset
         ldx     [%g3+0x20], %g5       ! t->mode
 
-        set     0x80000000, %g2       ! valid tte, 8k size
         sllx    %g2, 32, %g2
         or      %g2, %g5, %g2         ! mix in translation mode
         or      %g2, %g4, %g3         ! mix in phys addr mode
@@ -376,17 +415,57 @@ immu_next_trans:
         brlz    %g7, immu_next_trans  ! va < t->virt ?
          nop
         ldx     [%g3+0x10], %g4       ! t->size
-        sub     %g7, %g4, %g4         ! va >= t->virt - t->size ?
-        brgez   %g4, immu_next_trans
+        cmp     %g7, %g4              ! va >= t->virt - t->size ?
+        bge     immu_next_trans
          nop
 
-        ! install 8k tlb entry
-
+        sethi   %hi(8192), %g2
+        cmp     %g4, %g2
+        ble     immu_install
+         sethi  %hi(0x80000000), %g2  ! valid tte, 8k size
+
+immu_64k:
+        sethi   %hi(65536), %g2
+        cmp     %g4, %g2
+        bgt     immu_512k
+         sethi  %hi(0xa0000000), %g2  ! valid tte, 64k size
+
+        srlx    %g7, 16, %g7          ! round va to 64k page
+        sllx    %g7, 16, %g7
+        srlx    %g1, 16, %g1          ! round offset to 64k page
+
+        ! install 64k tlb entry
+        ba      immu_install
+         sllx    %g1, 16, %g1
+
+immu_512k:
+        sethi   %hi(512*1024), %g2
+        cmp     %g4, %g2
+        bgt     immu_4m
+         sethi  %hi(0xc0000000), %g2  ! valid tte, 512k size
+
+        srlx    %g7, 19, %g7          ! round va to 512k page
+        sllx    %g7, 19, %g7
+        srlx    %g1, 19, %g1          ! round offset to 512k page
+
+        ! install 512k tlb entry
+        ba      immu_install
+         sllx   %g1, 19, %g1
+
+immu_4m:
+        srlx    %g7, 22, %g7          ! round va to 4M page
+        sllx    %g7, 22, %g7
+        srlx    %g1, 22, %g1          ! round offset to 4M page
+        sllx    %g1, 22, %g1
+
+        ! install 4M tlb entry
+        sethi   %hi(0xe0000000), %g2  ! valid tte, 4M size
+
+immu_install:
         ldx     [%g3+0x18], %g4       ! t->phys
         add     %g4, %g7, %g4         ! %g4 page physical address = t->phys + offset
         ldx     [%g3+0x20], %g5       ! t->mode
 
-        set     0x80000000, %g2       ! valid tte, 8k size
         sllx    %g2, 32, %g2
         or      %g2, %g5, %g2         ! mix in translation mode
         or      %g2, %g4, %g3         ! mix in phys addr mode
-- 
1.5.6.5

